.png){kind=icon}
返回
Limits to binary logic switch scaling - A Gedanken model
.png){kind=icon}
OA
AI
DOI：10.1109/JPROC.2003.818324.png)
.png){kind=icon}
原文求助.png){kind=icon}
分享.png){kind=icon}
收藏
摘要
En 中文
In this paper we consider device scaling and speed limitations on irreversible von Neumann computing,that arc derived from the requirement of least energy computation. We consider computational systems whose material realizations utilize electrons and energy barriers to represent and manipulate their binary representations of state.
Keyword:
closely pocked devices
device scaling limits
digital integrated circuits
heat removal
nanotechnology
power consumption
tunneling
期刊
IF:
25.9
论文数:
9.9K
被引数:
4.5W
机构
暂无机构信息
引用论文
Beam Steering Phased Array Antenna With Fully Printed Phase Shifters Based on Low-Temperature Sintered BST-Composite Thick Films基于低温烧结BST复合厚膜的全印移相器波束控制相控阵天线
PREAI
分享收藏Intermolecular cooperativity and entanglement network in a miscible PLA/PMMA blend in the presence of nanosilica.png)
Polymer
PolymerIF0
PREAI
分享收藏 没有更多内容
没有更多内容