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Logarithmically Optimized Real-Time HDR Tone Mapping With Hardware Implementation

delete2024-03-01
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PRE
AI
S
Sidharth Kashyap
P
Pushpa Giri *
A
Ashish Kumar Bhandari
DOI:10.1109/TCSII.2023.3325942delete
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摘要

摘要

En 中文
This brief offers a resource-efficient hardware architecture for the Drago tone-mapping operator without any degradation in conformance performance. Analysis of resource consumption of various arithmetic operations is presented and the logarithmic number system (LNS) is adopted for optimization without adding conversion cost into and from LNS. LNS uses a resource-efficient and accurate digit-recurrence-based method for logarithmic implementation. This LNS simplifies the complex arithmetic operations of large-bit-width and lowers the cost of implementation of adaptation parameters. The adaptation parameter is further optimized by resource reutilization. This optimization leads to significant reduction in resource and digital signal processors (DSP) consumption. This design uses pipelined parallel processing which provides sufficient throughput and makes this implementation a better choice for real-time HD video processing for high dynamic range applications with a better tone mapping quality index score.
Keyword:
Field-programmable gate arrays (FPGAs)
high dynamic range (HDR)
logarithmic number system (LNS)

期刊

I
IEEE Transactions on Circuits and Systems and Express Briefs
IF:
4.9
论文数:
8.8K
被引数:
2.5W

机构

N
national institute of technology (nit system)
学者数:
4.0W
论文数: 3.7W
被引数: 31
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