MAP-SIM: A DNN-Specific Mapping Optimization Framework for Shared-Memory CPU-Systolic Array Architectures

Yuhang Li

doi:10.1109/TCAD.2025.3568347

MAP-SIM: A DNN-Specific Mapping Optimization Framework for Shared-Memory CPU-Systolic Array Architectures

2025-05-08

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DOI：10.1109/TCAD.2025.3568347

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As performance demands continue to rise, shared-memory heterogeneous systems (SMHSs) have been widely adopted for their ability to enable efficient communication and data sharing between different heterogeneous cores. However, existing SMHS face challenges in uneven workload distribution among heterogeneous cores and suboptimal mapping schemes, preventing them from fully leveraging their architectural advantages. To address these issues, this article proposes a mapping-aware framework for modeling SMHSs called MAP-SIM. By performing performance modeling for CPUs and systolic arrays (SAs), and considering rational schemes for the partition and mapping of computational tasks, MAP-SIM aims to evaluate and optimize the computational performance of heterogeneous multicore architectures. The experimental results show that compared to previous work, MAP-SIM can increase simulation speed by 14 to 67 times and can also enhance the computational performance of SMHS by 1.4 to 4.4 times.

Keywords:

Mapping scheme

performance model

shared memory heterogeneous system

systolic array

MAP-SIM: A DNN-Specific Mapping Optimization Framework for Shared-Memory CPU-Systolic Array Architectures

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