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Mitigating Sampling Noise for Energy-Efficient ADCs: A Tutorial Brief
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DOI：10.1109/TCSII.2023.3337969.png)
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摘要
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The sampling noise is a fundamental issue that limits the energy efficiency of analog-to-digital converters (ADCs). This brief gives a tutorial on the emerging sampling noise mitigation techniques, including the time-domain noise cancellation, the frequency-domain noise decoupling and the continuous-time (CT) ADCs that obviate the sampling front-end. The operation principles, limitations, and future development trends with these techniques are discussed.
Keyword:
Noise cancellation
Switches
Bandwidth
Delays
Thermal noise
Capacitors
Time-domain analysis
Analog-to-digital converter (ADC)
sampling noise
kT/C noise cancellation
noise decoupling
continuous-time (CT) ADC
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4.9
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8.8K
被引数:
2.5W
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