.png){kind=icon}
.png){kind=icon}
Return
Modular Arithmetic Based on Boolean Functions: A Divide and Conquer Approach
.png){kind=icon}
OA
AI
DOI：10.1109/ACCESS.2025.3626755.png)
.png){kind=icon}
.png){kind=icon}
Share.png){kind=icon}
Save
Abstract
En 中文
This paper introduces a new method for designing modular arithmetic units, for reduction ( $X (mod\ P)$ ), multiplication ( $(A\cdot B) (mod\ P)$ ), and multiplication by a constant ( $(constant\cdot A)(mod \ P)$ ). The proposed method employs a divide and conquer strategy, splitting input vectors in the first stage and merging the results in a second stage. A framework has been developed to automate the process. Experimental results obtained from implementing the proposed modular arithmetic designs on reconfigurable devices (FPGAs) demonstrate that our approach outperforms standard FPGA design tools, achieving up to $30\times $ better area efficiency (in LUT usage) and up to $2.9\times $ higher speed for inputs up to 500 bits.
Keywords:
Boolean functions
computer arithmetic
FPGAs
residue number system (RNS)
AI Summary
Key information extracted from the uploaded paper, including a brief overview, abstract, background, key highlights, visual analysis, and future outlook.