Motion estimation processor using mixed-signal approach

M. Panovic

doi:10.1109/TCSII.2006.873830

2006-06-01

PRE

M. Panovic *

Andreas Demosthenous

DOI：10.1109/TCSII.2006.873830

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摘要

En 中文

This paper describes the design, realization, and evaluation of a mixed-signal motion estimation processor using the full-search block-matching algorithm. The approach features digital I/O and a low-power, compact analog computational core. The proof-of-concept realization whose architecture incorporates pixel reuse, was fabricated in 0.8-mu m CMOS technology occupying 0.65 mm(2), and operates on 4 x 4 pixel blocks and a search area of 8 x 8 pixels. The processor achieves a low energy consumption per motion vector of 1.35 nJ and dissipates 0.8 mW from a 3-V power supply at QCIF 15 frames/s. The approach is intended for portable applications of digital video encoding.

Keyword:

block matching

low-power CMOS circuits

mixed-signal circuits

motion estimation (ME)

video encoding

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IEEE Transactions on Circuits and Systems and Express Briefs

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4.9

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8.8K

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