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Multiple histogram-based face recognition with high speed FPGA implementation
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DOI：10.1007/s11042-018-5647-8.png)
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摘要
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Face recognition is an algorithm that is capable of identifying or verifying a query face from multiple faces in the enrollment database. It poses a challenging problem in the field of image analysis and computer vision, especially for applications that deal with video sequences, face re-identification, or operate on intensity images and require fast processing. In this work, we introduce a high speed face recognition technique along with a high speed FPGA implementation. It uses a new similarity measure to estimate the distance between the query face and each of the database face images. The distance metric is the sum of the standard deviations between multiple histograms, which are calculated from each row of the query and database images. The lowest distance score refers to the database face that matches the query. The proposed technique is independent from the ambient illumination and outperforms the well-known face recognition algorithm Eigenfaces (it performs the face recognition 16 x faster when both algorithms run on the same platform). Furthermore, we exploit data parallelism in our proposed algorithm to design a hardware accelerator and to implement it on an FPGA prototyping board. The results show 10x execution time improvement in comparison to the software version.
Keyword:
Face recognition
Gamma correction
Performance
Hardware accelerator
FPGA
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期刊
IF:
3
论文数:
2.0W
被引数:
3.2W
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