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Parallel Algorithms for Testing Finite State Machines: Generating UIO Sequences

delete2016-11-01
delete17
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OA
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R
Robert M. Hierons *
U
Uraz Cengiz Türker
DOI:10.1109/TSE.2016.2539964delete
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摘要

摘要

En 中文
This paper describes an efficient parallel algorithm that uses many-core GPUs for automatically deriving Unique Input Output sequences (UIOs) from Finite State Machines. The proposed algorithm uses the global scope of the GPU's global memory through coalesced memory access and minimises the transfer between CPU and GPU memory. The results of experiments indicate that the proposed method yields considerably better results compared to a single core UIO construction algorithm. Our algorithm is scalable and when multiple GPUs are added into the system the approach can handle FSMs whose size is larger than the memory available on a single GPU.
Keyword:
Software engineering/software/program verification
software engineering/testing and debugging
software engineering/test design
finite state machine
unique input output sequence generation
general purpose graphics processing units
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期刊

IEEE Transactions on Software Engineering 封面图
IEEE Transactions on Software Engineering
IF:
5.6
论文数:
2.9K
被引数:
1.1W

机构

B
brunel university
学者数:
5.8K
论文数: 7.1K
被引数: 9
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