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Performance evaluation of computer architectures with main memory data compression

delete1999-02-01
delete35
PRE
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M
Morten KjelsØ
M
Mark Gooch
S
Simon Jones
DOI:10.1016/S1383-7621(98)00006-Xdelete
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摘要

摘要

En 中文
In this paper we investigate the application of data compression to the main memory of current workstation architectures. We propose an organisation where data and code are stored in compressed form while there is competition for memory resources. Main memory data compression allows programs with working sets much greater than physical memory to execute efficiently without resorting to costly disk paging activity. A performance model for this architecture clearly demonstrates that system performance may be improved by up to a factor of two when using software based memory compression instead of paging, while hardware assisted memory compression can improve performance by up to an order of magnitude. (C) 1999 Elsevier Science B.V. All rights reserved.
Keyword:
computer architecture
data compression
performance modelling
memory system
virtual memory
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期刊

Journal of Systems Architecture 封面图
Journal of Systems Architecture
IF:
4.1
论文数:
3.0K
被引数:
4.2K

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