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Pipelined Algorithm and Modular Architecture for Matrix Transposition
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DOI：10.1109/TCSII.2018.2880437.png)
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This brief presents a novel pipelined algorithm for transposing an N x N matrix, as well as a modular architecture for this algorithm. The architecture is optimal in both memory, using the minimum number of registers necessary to transpose an N x N matrix, and latency, achieving the theoretical minimum. The architecture is composed of a series of identical cascaded basic circuits and has a simple control strategy. Furthermore, the algorithm and architecture can be easily extended to p-parallel where p is any factor of N.
Keyword:
Matrix transposition
modular architecture
permutation circuit
pipelined algorithm
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