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Printed circuit board assembly time minimisation using a novel Bees Algorithm

delete2019-07-01
delete17
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OA
AI
M
Marco Castellani *
S
Sameh Otri
D
Duc Truong Pham
DOI:10.1016/j.cie.2019.05.015delete
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摘要

摘要

En 中文
This paper presents a novel version of the Bees Algorithm customised to solve combinatorial optimisation problems. This version was created to minimise assembly time in the manufacturing of printed circuit boards using a machine of the moving-board-with-time-delay type, and optimising the feeder arrangement and machine component placement sequence. The local search procedure of the standard Bees Algorithm was modified to include five new operators for combinatorial optimisation. The customised Bees Algorithm was first tested on the related travelling salesman problem, where it excelled in terms of performance and efficiency compared to three state-of-the-art optimisation methods. It was then applied to a well-known moving-board-with-time-delay benchmark problem, where it performed favourably in comparison to the state-of-the-art in the literature, achieving fast and consistent solutions.
Keyword:
Combinatorial optimisation
Bees Algorithm
Printed circuit board assembly
Manufacturing
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期刊

Computers and Industrial Engineering 封面图
Computers and Industrial Engineering
IF:
6.5
论文数:
1.0W
被引数:
3.8W

机构

U
University of Birmingham
学者数:
4.1W
论文数: 3.8W
被引数: 5.0W
C
Cardiff University
学者数:
2.7W
论文数: 2.5W
被引数: 3.5W
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