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Quantitative analysis of packet-processing applications regarding architectural guidelines for network-processing-engine development
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DOI：10.1016/j.sysarc.2009.07.001.png)
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This paper presents a simulation-based profile-driven quantitative analysis of packet-processing applications. In this domain, demands for increasing the performance and the ongoing development of network protocols both call for flexible and performance-optimized engines. Based on the achieved profiling results, we introduce platform-independent analysis that locates the performance bottlenecks and architectural challenges of a packet-processing engine. Finally based on these results, we extract helpful architectural guidelines for design of a flexible and high-performance embedded processor that is optimized for packet-processing operations in high-performance and cost-sensitive network embedded applications. (C) 2009 Elsevier B.V. All rights reserved.
Keyword:
Packet-processing
Packet-processing engine
Application-specific processor
Benchmark profiling
Architectural guideline
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