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RelHDx: Hyperdimensional Computing for Learning on Graphs With FeFET Acceleration

delete2025-01-01
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PRE
AI
J
Jaeyoung Kang
M
Minxuan Zhou
W
Weihong Xu
T
Tajana Rosing *
DOI:10.1109/TC.2025.3541141delete
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Abstract

Abstract

En 中文
Graph neural networks (GNNs) are a powerful machine learning (ML) method to analyze graph data. The training of GNN has compute and memory-intensive phases along with irregular data movements, which makes in-memory acceleration challenging. We present a hyperdimensional computing (HDC)-based graph ML framework called RelHDx that aggregates node features and graph structure, along with representing node and edge information in high-dimensional space. RelHDx enables single-pass training and inference with simple arithmetic operations, resulting in the efficient design of graph-based ML tasks: node classification and link prediction. We accelerate RelHDx using scalable processing in-memory (PIM) architecture based on emerging ferroelectric FET (FeFET) technology. Our accelerator uses a data allocation optimization and operation scheduler to address the irregularity of the graph and maximize the performance. Evaluation results show that RelHDx offers comparable accuracy to popular GNN-based algorithms while achieving up to $63.8\boldsymbol{\times}$63.8x faster speed on GPU. Our FeFET-based accelerator, RelHDx-PIM, is $32\boldsymbol{\times}$32x faster for node classification, while for link prediction it is $65.4\boldsymbol{\times}$65.4x faster than when running on GPU. Furthermore, RelHDx-PIM improves energy efficiency by four orders of magnitude over GPU. Compared to the state-of-the-art in-memory processing-based GNN accelerator, PIM-GCN [1], RelHDx-PIM is $10\boldsymbol{\times}$10x faster and $986\boldsymbol{\times}$986x more energy-efficient on average.
Keywords:
FeFETs
Training
Energy efficiency
Encoding
Graphics processing units
Logic gates
Accuracy
Vectors
Classification algorithms
Graph neural networks
Hyperdimensional computing
graph-based machine learning
graph neural networks
processing-in-memory
ferroelectric field-effect transistor

Journal

IEEE Transactions on Computers cover
IEEE Transactions on Computers
IF:
3.8
Papers:
5.3K
Citations:
9.8K

Organization

University of California System cover
University of California System
Scholars:
37.5W
Papers: 33.7W
Citations: 6.6K