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Reversible-logic design with online testability
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DOI：10.1109/TIM.2006.870319.png)
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摘要
En 中文
Conventional digital circuits dissipate a significant amount of energy because bits of information are erased during the logic operations. Thus, if logic gates are designed such that the information bits are not destroyed, the power consumption can be reduced dramatically. The information bits are not lost in case of a reversible computation. This has led to the development of reversible gates. This paper proposes three new reversible logic gates; two of the proposed gates can be employed to design online testable reversible logic circuits. Furthermore, they can be used to implement any Boolean logic function. The application of the reversible gates in implementing several benchmark functions has been presented.
Keyword:
Fredkin gate
garbage outputs
online testing
reversible logic
Toffoli gate
two-pair two-rail checker
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期刊
IF:
5.9
论文数:
2.0W
被引数:
5.8W
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