RIGHT: GPU-Optimized Parallel PQC HAETAE for High-Throughput Cryptographic Acceleration

doi:10.1109/TII.2025.3613305

2025-10-01

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DOI：10.1109/TII.2025.3613305

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摘要

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The rapid development of quantum computing poses a significant threat to the security of the Industrial Internet of Things (IIoT), rendering traditional cryptographic systems inadequate for ensuring long-term security. As a fundamental technology for establishing trust in IIoT networks, digital signatures are essential for secure device authentication, data integrity verification, and the protection of communication channels. However, implementing efficient digital signature schemes in resource-constrained embedded devices presents significant challenges, particularly when faced with the demands of postquantum cryptography (PQC). We propose a scheme for resource-intensive GPU optimization for HAETAE throughput tuning (RIGHT). Specifically, we employ coarse-grained parallelism and kernel fusion to maximize the parallel processing capabilities of GPUs. Furthermore, we present a hierarchical data locality optimization method for NTT/INTT and FFT, and optimize the SHAKE256 using CUDA PTX instructions, further enhancing throughput to meet the high concurrency and computational performance requirements of IIoT applications. On the Jetson Xavier, the signing performance of HAETAE is 1.25 x, 1.09 x, and 1.31 x that of the Intel i7-10700 K CPU with AVX2, while verification performance is about 4 times faster, demonstrating low power consumption and high efficiency, making it suitable for edge computing. Specifically, on the NVIDIA RTX 4090, the signature throughput reaches 155 324 ops/s, and the verification throughput reaches 4 276 075 ops/s, showcasing significant parallel computing capabilities, which is ideal for large-scale digital signature verification tasks in IIoT.

Keyword:

Industrial Internet of Things

Graphics processing units

Digital signatures

Cryptography

Security

Kernel

Throughput

Parallel processing

Standards

Real-time systems

Cryptographic engineering