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Robust and Large-Scale Convolution through Stochastic-Based Processing without Multipliers
DOI:10.1109/TETC.2016.2601220.png)
摘要
En 中文
Large-scale discrete convolution, well-known to be computationally intensive, is a fundamental algorithmic building block in many computer vision and artificial intelligence applications. This work presents a novel stochastic-based hardware architecture and design that computes discrete convolution based on the widely-used convolution theorem. Our approach has three advantages. First, it can achieve approximately O(1) in algorithmic complexity for any given absolute error bound d and any given input vector size N. This computing complexity, when compared with O(N-2) and O(N log N) operations for conventional multiplier-based and 1-FFT-based architectures respectively, represents a significant improvement, although at the cost of degraded computing accuracy. Second, to achieve a given computing accuracy, our proposed stochastic-based convolution can be analytically proven to only require a moderate number of random samples, e.g., 788 random samples can achieve 95 percent accuracy at 99 percent confidence level for a convolution with N = 128. Third, this proposed stochastic-based architecture is highly fault-tolerant because the information to be processed is encoded with a large ensemble of random samples. As such, the local perturbations of its computing accuracy will be dissipated globally, thus becoming inconsequential to the final overall results. We believe that, being highly scalable and energy efficient, our stochastic-based convolution architecture is well-suited for many real-time embedded applications, especially those perception-based computing tasks that are inherently fault-tolerant. In short, this work provides an elegant way to tradeoff between computing accuracy and computing performance/hardware efficiency for many real-world convolution-based applications.
Keyword:
Discrete convolution
FPGA
stochastic logic
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期刊
IF:
5.4
论文数:
1.1K
被引数:
3.4K


