Security Primitives for Reconfigurable Hardware-Based Systems

Ted Huffmire

doi:10.1145/1754386.1754391

Security Primitives for Reconfigurable Hardware-Based Systems

2010-05-01

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DOI：10.1145/1754386.1754391

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Computing systems designed using reconfigurable hardware are increasingly composed using a number of different Intellectual Property (IP) cores, which are often provided by third-party vendors that may have different levels of trust. Unlike traditional software where hardware resources are mediated using an operating system, IP cores have fine-grain control over the underlying reconfigurable hardware. To address this problem, the embedded systems community requires novel security primitives that address the realities of modern reconfigurable hardware. In this work, we propose security primitives using ideas centered around the notion of moats and drawbridges. The primitives encompass four design properties: logical isolation, interconnect traceability, secure reconfigurable broadcast, and configuration scrubbing. Each of these is a fundamental operation with easily understood formal properties, yet they map cleanly and efficiently to a wide variety of reconfigurable devices. We carefully quantify the required overheads of the security techniques on modern FPGA architectures across a number of different applications.

Keywords:

Design

Security

Field Programmable Gate Arrays (FPGAs)

Advanced Encryption Standard (AES)

memory protection

separation

isolation

controlled sharing

hardware security

reference monitors

execution monitors

enforcement mechanisms

security policies

static analysis

security primitives

Systems-on-a-Chip (SoCs)

Security Primitives for Reconfigurable Hardware-Based Systems

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