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Selective Gray-Coded Bit-Plane-Based Two-Bit Transform and Its Efficient Hardware Architecture for Low-Complexity Motion Estimation
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DOI：10.1109/TCE.2018.2851786.png)
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摘要
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In this paper, a novel low bit-depth representation-based motion estimation approach with its hardware architecture is presented. The low bit-depth representation of pixels in the proposed method is constructed by choosing them from the gray-coded bit planes in an efficient way. Additionally, a new matching creation is also presented to improve the motion estimation accuracy. Thanks to the proposed binarization approach, the computation load is considerably reduced compared to filtering-based low bit-depth representation motion estimation methods. A novel hardware architecture for the proposed method is also presented in this paper. Experimental results revealed that the proposed motion estimation method and its hardware architecture provides a good balance between motion estimation accuracy and hardware resources especially for consumer electronics applications.
Keyword:
Low-complexity binarization
gray coding
motion estimation
one-bit transform
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10.9
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6.8K
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Selective Gray-Coded Bit-Plane Based Low-Complexity Motion Estimation and its Hardware Architecture
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