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Single chip video processor for digital HDTV
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AI
DOI：10.1109/30.964126.png)
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摘要
En 中文
We have developed a single chip video processor integrated TS decoder, MPEG2 MP@HL decoder and OSD controller for BS digital broadcasting. The video processor is available for all the formats of digital broadcasting and displays output on the Hi-Vision (high-definition) CRT in SDTV as well as HDTV. Also, 4-channel decoding/display and multi-angle broadcasting of digital TV is obtained. It has excellent functions such as seamless display, audio/video (AV) synchronization, error concealment, etc. Adoption of cooperative processing architecture with hardware and software, pipeline architecture and parallel bus architecture allows flexible support of operating frequency reduction, circuit miniaturization, design simplification, high-performance service of BS digital TV, digital TV broadcasting regulation change and equipment specification change. This single chip video processor is manufactured of 0.25-mum four-layer metal CMOS process and the chip size is 10.2 mm x 10.2 mm. The power consumption is 4.5 W when the supply voltage is 2.5 V and operating frequency is 121.5 MHz.
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