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SpiNNaker-Programming Model

delete2014-01-01
delete27
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OA
AI
A
A.D. Brown *
S
Steve Furber
J
Jeffrey S. Reeve
J
Jim Garside
K
Kier Dugan
L
Luis A. Plana
S
Steve Temple
DOI:10.1109/TC.2014.2329686delete
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摘要

摘要

En 中文
SpiNNaker is a multi-core computing engine, with a bespoke and specialised communication infrastructure that supports almost perfect scalability up to a hard limit of 2(16) x 18 = 1,179,648 cores. This remarkable property is achieved at the cost of ignoring memory coherency, global synchronisation and even deterministic message passing, yet it is still possible to perform meaningful computations. Whilst we have yet to assemble the full machine, the scalability properties make it possible to demonstrate the capabilities of the machine whilst it is being assembled; the more cores we connect, the larger the problems become that we are able to attack. Even with isolated printed circuit boards of 864 cores, interesting capabilities are emerging. This paper is the third of a series charting the development trajectory of the system. In the first two, we outlined the hardware build. Here, we lay out the (rather unusual) low-level foundation software developed so far to support the operation of the machine.
Keyword:
Interconnection architectures
parallel processors
neurocomputers
real-time distributed
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IEEE Transactions on Computers 封面图
IEEE Transactions on Computers
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3.8
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5.3K
被引数:
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U
university of southampton
学者数:
3.3W
论文数: 3.2W
被引数: 52
U
University of Manchester
学者数:
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论文数: 5.3W
被引数: 7.4W
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