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Static State Estimation Without Topology Processor
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DOI：10.1109/TPWRS.2021.3064975.png)
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Abstract
En 中文
A state estimation framework that eliminates the need for a topology processor is presented in this paper. By retaining switching devices (SDs) in the network model, this approach allows estimation of their statuses. Consequently, topology error detection becomes part of the SE process. Since this approach requires expansion of bus-branch models with SDs, the conventional state estimation formulation is accordingly modified to avoid numerical issues due to extremely small (large) impedance values of open (closed) switching devices. The scalability of the proposed framework is achieved by parallel processing, which is implemented after partitioning the system into zones. The measurement overhead is kept minimal by utilizing two optimal measurement placement algorithms and taking advantage of KCL-based virtual measurements. Case studies presented show that the proposed method can identify concurrent bad data and topology errors. The improvements in computation times due to parallel processing are demonstrated through simulations on the IEEE 300-bus system with and without zone-partitioning.
Keywords:
Topology
Mathematical model
Network topology
Substations
Computational modeling
Voltage measurement
Circuit breakers
Circuit breaker
Hachtel's method
least absolute value
state estimation
topology processor
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