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Statistical Reliability Estimation of Microprocessor-Based Systems

delete2012-11-01
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OA
AI
A
Alessandro Savino *
S
Stefano Di Carlo
G
Gianfranco Politano
A
Alfredo Benso
A
Alberto Bosio
G
Giorgio Di Natale
DOI:10.1109/TC.2011.188delete
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摘要

摘要

En 中文
What is the probability that the execution state of a given microprocessor running a given application is correct, in a certain working environment with a given soft-error rate? Trying to answer this question using fault injection can be very expensive and time consuming. This paper proposes the baseline for a new methodology, based on microprocessor error probability profiling, that aims at estimating fault injection results without the need of a typical fault injection setup. The proposed methodology is based on two main ideas: a one-time fault-injection analysis of the microprocessor architecture to characterize the probability of successful execution of each of its instructions in presence of a soft-error, and a static and very fast analysis of the control and data flow of the target software application to compute its probability of success. The presented work goes beyond the dependability evaluation problem; it also has the potential to become the backbone for new tools able to help engineers to choose the best hardware and software architecture to structurally maximize the probability of a correct execution of the target software.
Keyword:
Microprocessor reliability
safety-critical systems
statistical analysis
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期刊

IEEE Transactions on Computers 封面图
IEEE Transactions on Computers
IF:
3.8
论文数:
5.3K
被引数:
9.8K

机构

C
centre national de la recherche scientifique (cnrs)
学者数:
24.5W
论文数: 18.2W
被引数: 279
P
Polytechnic University of Turin
学者数:
1.3W
论文数: 1.3W
被引数: 1.3W
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