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The TH Express high performance interconnect networks

delete2014-06-06
delete48
PRE
AI
Z
Zhengbin Pang
M
Min Xie
J
Jun Zhang
Y
Yi Zheng
G
Guibin Wang *
D
Dezun Dong
G
Guang Suo
DOI:10.1007/s11704-014-3500-9delete
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摘要

摘要

En 中文
Interconnection network plays an important role in scalable high performance computer (HPC) systems. The TH Express-2 interconnect has been used in MilkyWay-2 system to provide high-bandwidth and low-latency interprocessor communications, and continuous efforts are devoted to the development of our proprietary interconnect. This paper describes the state-of-the-art of our proprietary interconnect, especially emphasizing on the design of network interface. Several key features are introduced, such as user-level communication, remote direct memory access, offload collective operation, and hardware reliable end-to-end communication, etc. The design of a low level message passing infrastructures and an upper message passing services are also proposed. The preliminary performance results demonstrate the efficiency of the TH interconnect interface.
Keyword:
HPC
network interface chip (NIC)
TH Express interconnect
offload collective operation

期刊

Frontiers of Computer Science 封面图
Frontiers of Computer Science
IF:
4.6
论文数:
1.6K
被引数:
2.8K

机构

N
national university of defense technology - china
学者数:
1.8W
论文数: 1.4W
被引数: 9
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