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Thermal-Aware Design for Approximate DNN Accelerators
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DOI：10.1109/TC.2022.3141054.png)
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Recent breakthroughs in Neural Networks (NNs) have made DNN accelerators ubiquitous and led to an ever-increasing quest on adopting them from Cloud to edge computing. However, state-of-the-art DNN accelerators pack immense computational power in a relatively confined area, inducing significant on-chip power densities that lead to intolerable thermal bottlenecks. Existing state of the art focuses on using approximate multipliers only to trade-off efficiency with inference accuracy. In this work, we present a thermal-aware approximate DNN accelerator design in which we additionally trade-off approximation with temperature effects towards designing DNN accelerators that satisfy tight temperature constraints. Using commercial multi-physics tool flows for heat simulations, we demonstrate how our thermal-aware approximate design reduces the temperature from 139 degrees C, in an accurate circuit, down to 79 degrees C. This enables DNN accelerators to fulfill tight thermal constraints, while still maximizing the performance and reducing the energy by around 75% with a negligible accuracy loss of merely 0.44% on average for a wide range of NN models. Furthermore, using physics-based transistor aging models, we demonstrate how reductions in voltage and temperature obtained by our approximate design considerably improve the circuit's reliability. Our approximate design exhibits around 40% less aging-induced degradation compared to the baseline design.
Keyword:
Approximate computing
deep neural networks
neural processing unit
reliability
systolic MAC array
temperature
thermal design
VLSI
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3.8
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5.4K
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9.8K
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分享收藏Superlattice-based thin-film thermoelectric modules with high cooling fluxes.png)
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