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Three-dimensional computational wavefronts for matrix product
DOI:10.1016/0045-7906(95)00032-1.png)
摘要
En 中文
A three-dimensional wavefront array for matrix product with minimal block pipelining period of 1 is introduced and compared to existing systolic array architectures for matrix product. An optimal processor-time product of n(3) with cycles defined computationally by two operations is obtained when successive problem instances are considered. The 3-D architecture; is extensible and scalable, is cycle invariant (all respects), is node invariant (all respects), has minimal node complexity of one multiply and one addition per cycle, has unidirectional and local data forwarding in three dimensions, has 100% utilization of processing elements, and has a cycle-invariant one-to-one correspondence between input/output ports and input/output matrix elements.
Keyword:
computer architecture
pipelining
systolic array
throughput
matrix product
processor time
three-dimensional
wavefronts
parallel processing
latency
期刊
C
IF:
4.9
论文数:
6.7K
被引数:
1.3W
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