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TreasureCache: Hiding Cache Evictions Against Side-Channel Attacks

delete2024-09-01
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PRE
AI
M
Mengming Li
K
Kai Bu *
C
Chenlu Miao
K
Kui Ren
DOI:10.1109/TDSC.2024.3354991delete
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摘要

摘要

En 中文
Cache side-channel attacks remain a stubborn source of cross-core secret leakage. Such attacks exploit the timing difference between cache hits and misses. Most defenses thus choose to prevent cache evictions. Given that two possible types of evictions-flush-based and conflict-based-use different architectural features, these defenses have to integrate hybrid defense strategies, incur OS modification, and sacrifice performance to completely throttle cache side-channel attacks. In this article, we present TreasureCache against cache side-channel attacks without modifying OS or sacrificing performance. Instead of preventing cache evictions with various costs, we advocate to allow cache evictions as is and hide exploitable evictions in our specialized small eviction-hidden buffer. The buffer guarantees a fast hit time comparative to LLC hits. This instantly closes the timing gap between accessing exploitable blocks when they are in and out of the LLC. Moreover, with the help of our buffer, we no longer have to disable flush instructions or shared memory. A lightweight constant-time flush instruction can help TreasureCache to prevent both flush-based and conflict-based side-channel attacks. We validate TreasureCache security and performance through extensive experiments. With a hardware overhead of less than 0.5%, TreasureCache reduces the secret-leakage resolution by about 1,000 times without introducing any performance slowdown.
Keyword:
Side-channel attacks
Timing
Security
Hardware
Software
Computer science
Behavioral sciences
Cache side-channel attack
eviction-hidden buffer
secure replacement policy

期刊

IEEE Transactions on Dependable and Secure Computing 封面图
IEEE Transactions on Dependable and Secure Computing
IF:
7.5
论文数:
2.5K
被引数:
9.6K

机构

Z
zhejiang university
学者数:
17.7W
论文数: 12.1W
被引数: 152
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