Video encoder architecture for MPEG2 real time encoding

Chen, GL

doi:10.1109/30.536123

Video encoder architecture for MPEG2 real time encoding

1996-01-01

10

PRE

AI

DOI：10.1109/30.536123

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A video encoder architecture for encoding digital video signals based on the MPEG2 video standard up to slice level is described, Function specific architecture is implemented to increase coding efficiency and reduce the silicon area for real time encoding. Hierarchical controlling concept is adopted and three stage pipeline encoding method is used in, macroblock coding to increase the flexibility of encoding flow and reduce the design effort. Most of computing pouter for a MPEG2 encoding algorithm is utilized in motion estimation, so a separate motion estimation module is used as a coprocessor. The motion estimation algorithm adopted is full search with search window in the range between +47 and -48 pels in horizontal direction and between +15 and -16 pels in vertical direction. Simulations on several video sequences with different target bit rates are evaluated. The results show that our implementation can achieve comparable video quality comparing to other off-line software simulation programs using exhaustive searches.

Video encoder architecture for MPEG2 real time encoding

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