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XNOR-Bitcount Operation Exploiting Computing-In-Memory With STT-MRAMs
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DOI：10.1109/TCSII.2023.3241163.png)
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摘要
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This brief presents an energy-efficient and high-performance XNOR-bitcount architecture exploiting the benefits of computing-in-memory (CiM) and unique properties of spin-transfer torque magnetic RAM (STT-MRAM) based on double-barrier magnetic tunnel junctions (DMTJs). Our work proposes hardware and algorithmic optimizations, benchmarked against a state-of-the-art CiM-based XNOR-bitcount design. Simulation results show that our hardware optimization reduces the storage requirement (-50%) for each XNOR-bitcount operation. The proposed algorithmic optimization improves execution time and energy consumption by about 30% (78%) and 26% (85%), respectively, for single (5 sequential) 9-bit XNOR-bitcount operations. As a case study, our solution is demonstrated for shape analysis using bit-quads.
Keyword:
Computing-in-memory
MAC
XNOR-bitcount
BNN
CNN
spin-transfer torque
STT-MRAM
DMTJ
bit-quad
期刊
I
IF:
4.9
论文数:
8.8K
被引数:
2.5W
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