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A Bioinspired Spiking Attention Neuromorphic Accelerator for Low-Power Visual Prosthesis
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DOI：10.1109/tim.2026.3712917.png)
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Abstract
En 中文
Retinal degenerative diseases have led to moderate-to-severe vision loss in over 230 million people globally. Visual prostheses aim to restore partial perception by converting external visual stimuli into neural-response patterns that can be delivered to the remaining visual pathway. Spiking neural models are particularly suitable for this task because they represent visual information in an event-driven temporal form that is compatible with neural signaling. However, existing approaches often rely on biologically oversimplified hierarchies and insufficient modeling of retinal-layer interactions and retina-to-cortex dynamics, limiting neural-response fidelity under complex visual stimuli. Meanwhile, implantable visual prostheses impose strict power and area constraints, making algorithm-hardware codesign essential. This article presents a bioinspired neuromorphic visual prosthesis framework that tightly couples spiking neural modeling with specialized hardware architecture. The proposed model emulates the hierarchical organization of the human retina through multiscale spiking convolutional layers that simulate photoreceptors, bipolar cells, and ganglion cells. Within this retinal hierarchy, a spiking attention mechanism is incorporated to model bottom-up visual dynamics and adaptive information modulation, enabling efficient spatiotemporal feature selection consistent with biological visual processing. A spiking linear readout layer is further employed to predict primary visual cortex (V1) responses to natural images. On the hardware side, we design a neuromorphic accelerator optimized for visual prosthesis tasks. The architecture integrates a multiside sparsity exploitation strategy with a multistage pipelined parallelism scheme to maximize energy efficiency and minimize area overhead. From an instrumentation perspective, the framework integrates event-driven visual sensing, spike-domain signal processing, and quantitative neural-response evaluation under implantable hardware constraints. Under 8-bit quantization, the proposed framework achieves a Pearson correlation of 0.713 for V1 response prediction. ASIC postsynthesis estimation under the TSMC 40-nm CMOS process reports a power consumption of 199.10 mW and a chip area of 7.89 mm2. Under ZCU106 FPGA deployment, the architecture achieves a throughput of 79.7 GOP/s and a peak energy efficiency of 259.2 GOPS/W.
Keywords:
Bottom-up attention
neuromorphic accelerator
spiking attention
visual prosthesis
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