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A Cartesian Error Feedback Architecture

delete2018-03-01
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PRE
AI
J
Jinbo Li
徐
徐志伟 (Zhiwei Xu)
洪
洪伟 (Wei Hong)
Q
Qun Jane Gu *
DOI:10.1109/TCSI.2017.2761394delete
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Abstract

Abstract

En 中文
A Cartesian error feedback architecture is proposed to address the linearity-noise tradeoff in the conventional Cartesian feedback architecture. First, the tradeoff in the conventional Cartesian feedback architecture is identified, which is caused by the contradictory requirements imposed by linearity and noise on the attenuation ratio in the feedback path. Then, this paper investigates how the signal cancellation provided by the new architecture mitigates the tradeoff. The effects of nonlinearities and noise from the feedforward path are also presented in detail. Furthermore, the matching requirements of the feedforward path for effective signal cancellation are discussed and proven not stringent due to the loop effect. To verify the concept, a WCDMA signal is taken as the application example, in which our proposed error feedback architecture presents more than 8 dB noise improvement while maintaining comparable linearity performance compared with the conventional architecture. This validates the deployment of the proposed Cartesian error feedback architecture in today's application scenarios with congested frequency spectrum.
Keywords:
Cartesian feedback
linearization
transmitter
noise
feedforward
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IEEE Transactions on Circuits and Systems I-Regular Papers cover
IEEE Transactions on Circuits and Systems I-Regular Papers
IF:
5.2
Papers:
9.8K
Citations:
2.2W

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U
university of california davis
Scholars:
3.4W
Papers: 2.6W
Citations: 45
University of California System cover
University of California System
Scholars:
37.5W
Papers: 33.8W
Citations: 6.6K
Z
zhejiang university
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17.7W
Papers: 12.1W
Citations: 152
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