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A compressed sensing neuromorphic processor for sparse signal classification
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DOI：10.3389/fnins.2026.1777090.png)
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Abstract
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This paper presents a neuromorphic processing system integrating a compressed sensing spiking neural network (CSSNN) designed for sparse signal classification. The proposed CSSNN combines data coding; data compression; and SNN classification; enabling end-to-end optimization of network performance and model compression. Evaluated on the MNIST; N-MNIST; and DVS Gesture datasets; under uniform compression ratios (CRs) of 0.1; 0.05; 0.025; and 0.01; the proposed CSSNN consistently reduces the total number of network operations (OPs) by at least 80% compared with compressed learning methods using fixed Gaussian random matrix (GRM) sampling matrices; while maintaining minimal accuracy loss. A specialized CSSNN processor is designed based on a spike-driven processing flow. Validated on field-programmable gate arrays (FPGAs) and evaluated in the 40 nm CMOS process for application-specific integrated circuit (ASIC) design; this CSSNN processor achieves 96.12% classification accuracy with 8-bit fixed-point quantization on the MNIST dataset. The energy consumption of the ASIC is estimated to be 2.089 mW under a 1.1-V supply voltage and 100 MHz frequency.
Keywords:
neuromorphic processor
spiking neural network (SNN)
compressed sensing (CS)
end-to-end
field programmable gate arrays (FPGA)
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