A Cryogenic Superconducting Quantum Computing Unit Interface Chipset With Phase-Detection-Based Readout and Phase-Shifter-Based Controller

Yanshu Guo

doi:10.1109/jssc.2026.3695612

A Cryogenic Superconducting Quantum Computing Unit Interface Chipset With Phase-Detection-Based Readout and Phase-Shifter-Based Controller

2026-05-27

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Yuanjin Zheng (Yuanjin Zheng)

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Hanjun Jiang

DOI：10.1109/jssc.2026.3695612

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This article presents a cryogenic quantum interface chipset at 3.5 K for superconducting transmon qubit operations. The chipset comprises a phase-detection readout and a phase-shifter-based polar-modulation controller with flexible scalability. With the proposed phase-detection readout scheme, a 9-bit time-to-digital converter (TDC)-based state detector is used to read out the qubit state by detecting the phase difference between the stimulus signal and the reflected signal. A low-IF N-path filter-based receiver and a multi-tone transmitter are co-designed to enable frequency-division multiplexing (FDM) dispersive readout of multiple qubits. A phase-shifter-based polar-modulation XY-driver is developed with support for fast phase quantum gate operation and derivative-removal-by-adiabatic-gate (DRAG) pulse generation. The Z-driver is realized using a static digital-to-analog converter (DAC) array and a 10-bit dynamic DAC for power efficiency. Fabricated in a 28-nm bulk CMOS process, the chipset occupies a die area of 4.6 mm². The readout RX achieves a noise temperature of 40 K with a gain of 45–83 dB and a bandwidth of 1.2 GHz. The readout RX consumes 32% less power than state-of-the-art designs. The measured total readout power for simultaneous detection of two qubits is 12.2 mW, which is the lowest among readouts with a similar integration level. In addition, the controller achieves a spurious-free dynamic range (SFDR) of 49 dB for a 1-GS/s Z-driver and an SNR of 42 dB for a 1-GS/s XY-driver. The XY-driver consumes 4.3 mW per qubit under active control. Verified with practical transmon qubits, the readout fidelity exceeds 92.6%, approaching that of commercial instruments. A Rabi experiment at 5.61/6.36 MHz, a Ramsey experiment at 4.1 MHz, and a T1 experiment at $9.98~{\mu }$ s are also successfully observed using the proposed chipset at 3.5 K.

Keywords:

Cryogenic CMOS (Cryo-CMOS)

quantum computing (QC)

qubit control

qubit readout

transmon qubit

A Cryogenic Superconducting Quantum Computing Unit Interface Chipset With Phase-Detection-Based Readout and Phase-Shifter-Based Controller

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