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A Design-Technology Co-Optimization Framework Based on Process-Parameter Sensitivity Analysis

delete2026-08-12
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OA
AI
R
Renjie Lu
C
Chenguang Liu
W
Wang Sun
Z
Zhaohui Qin
L
Lan Chen *
DOI:10.3390/electronics15163553delete
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Abstract

Abstract

En 中文
This paper proposes a design-technology co-optimization (DTCO) framework applicable to advanced technology nodes, which accelerates the process optimization exploration for such nodes. Developing automatic parameter extraction algorithms tailored for the BSIM-CMG model, along with predictive neural networks, substantially reduces the DTCO workflow cycle time. Data-driven sensitivity analysis of critical electrical parameters to process variations provides an optimization exploration path, guiding the optimization of process parameters. Taking the optimization of a 13-stage ring oscillator circuit at the 14 nm node as a case, the DTCO framework is employed to formulate Hfin process conditions for the respective requirements of minimum power consumption and maximum performance. The framework features good transferability and can be extended to the design-technology co-development of other advanced nodes and emerging device architectures.
Keywords:
DTCO
TCAD
FinFET
compact-model parameter extraction
PPA

Journal

Electronics cover
Electronics
IF:
2.6
Papers:
10.0K
Citations:
4.7W

Organization

C
chip cloud microelectronics technology company
Scholars:
5
Papers: 1
Citations: 0
C
chinese academy of sciences
Scholars:
56.7W
Papers: 45.0W
Citations: 704
Cited Papers

Cited Papers

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err2024-10-14
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errOAAI
errYiming Huang; Bin Li; Zhaohui Wu; Wenchao Liu
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APEX: Automating Parameter Extraction of Compact Models with Differential Neural Network Approximation
err2025-05-09
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PREAI
errZhang,Jianing; Dou,Jiaqi; Shen,Yang; Ye,Bingyi; Li,Xiaojin; Shi,Yanling; Zhang,Yuhang; Sun,Yabin
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Reliability Challenges with Self-Heating and Aging in FinFET Technology
err2019-07-01
err0
PREAI
errHussam Amrouch; Victor M. van Santen; Om Prakash; Hammam Kattan; Sami Salamin; Simon Thomann; Jorg Henkel
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Variability Aware Simulation Based Design- Technology Cooptimization (DTCO) Flow in 14 nm FinFET/SRAM Cooptimization
err2015-06-01
err0
PREAI
errAsen Asenov; Binjie Cheng; Xingsheng Wang; Andrew Robert Brown; Campbell Millar; Craig Alexander; Salvatore Maria Amoroso; Jente B. Kuang; Sani R. Nassif
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