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A fast task-to-processor assignment heuristic for real-time multiprocessor DSP applications

delete2003-04-01
delete1
PRE
AI
J
John W. Chinneck *
P
Pureza, V
G
Goubran, RA
G
G.M. Karam
M
Marco Lavoie
DOI：10.1016/S0305-0548(02)00031-Xdelete
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Abstract

Abstract

En 中文
The optimal assignment of the tasks to the processors to minimize total delay in a multiprocessor digital signal processing (DSP) architecture is extremely difficult, particularly for systems of many (e.g. 100) tasks. Two factors especially complicate the problem: (1) the multiprocessor architecture affects the inter-processor communication times, and (2) the specific assignment of tasks to processors affects the inter-task communication times. We develop a fast heuristic for assigning tasks to processors. There are two main ingredients in our method: (i) the choice of a useful general-purpose multiprocessor architecture for DSP applications, and (ii) an adaptive list-ordering heuristic which takes advantage of knowledge of the inter-processor communication characteristics of the chosen architecture. Examples are given, including comparisons to exact branch-and-bound methods, and a large sonar example.
Keywords:
task assignment
heuristic
critical path analysis
multiprocessor
digital signal processing
mapping
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Journal

C
Computers and Operations Research
IF:
4.3
Papers:
6.5K
Citations:
1.8W

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