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A Generalized Adjusted Min-Sum Decoder for 5G LDPC Codes: Algorithm and Implementation

delete2024-06-01
delete8
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OA
AI
Y
Yuqing Ren
H
Hassan Harb
Y
Yifei Shen
A
Alexios Balatsoukas‐Stimming
A
Andreas Burg *
DOI:10.1109/TCSI.2024.3368056delete
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Abstract

Abstract

En 中文
5G New Radio (NR) has stringent demands on both performance and complexity for the design of low-density parity-check (LDPC) decoding algorithms and corresponding VLSI implementations. Furthermore, decoders must fully support the wide range of all 5G NR blocklengths and code rates, which is a significant challenge. In this paper, we present a high-performance and low-complexity LDPC decoder, tailor-made to fulfill the 5G requirements. First, to close the gap between belief propagation (BP) decoding and its approximations in hardware, we propose an extension of adjusted min-sum decoding, called generalized adjusted min-sum (GA-MS) decoding. This decoding algorithm flexibly truncates the incoming messages at the check node level and carefully approximates the non-linear functions of BP decoding to balance the error-rate and hardware complexity. Numerical results demonstrate that the proposed fixed-point GA-MS has only a minor gap of 0.1 dB compared to floating-point BP under various scenarios of 5G standard specifications. Secondly, we present a fully reconfigurable 5G NR LDPC decoder implementation based on GA-MS decoding. Given that memory occupies a substantial portion of the decoder area, we adopt multiple data compression and approximation techniques to reduce 42.2% of the memory overhead. The corresponding 28nm FD-SOI ASIC decoder has a core area of 1.823 mm(2) and operates at 895 MHz. It is compatible with all 5G NR LDPC codes and achieves a peak throughput of 24.42 Gbps and a maximum area efficiency of 13.40 Gbps/mm(2) at 4 decoding iterations.
Keywords:
Decoding
5G mobile communication
Iterative decoding
Throughput
Hardware
Standards
Approximation algorithms
LDPC codes
generalized adjusted min-sum (GA-MS) decoding
belief propagation (BP)
hardware implementation
5G NR wireless communications

Journal

IEEE Transactions on Circuits and Systems I-Regular Papers cover
IEEE Transactions on Circuits and Systems I-Regular Papers
IF:
5.2
Papers:
9.9K
Citations:
2.2W

Organization

E
Ecole Polytechnique Federale de Lausanne
Scholars:
1.7W
Papers: 1.3W
Citations: 25
S
swiss federal institutes of technology domain
Scholars:
9.0W
Papers: 8.0W
Citations: 163
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