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A Low-Error Energy-Efficient Fixed-Width Booth Multiplier With Sign-Digit-Based Conditional Probability Estimation

delete2018-02-01
delete29
PRE
AI
Z
Ziji Zhang
Y
Yajuan He *
DOI：10.1109/TCSII.2017.2709801delete
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Abstract

Abstract

En 中文
Fixed-width multipliers are intensively used in many DSP applications whose accuracy and energy efficiency affect the whole digital system to a large extent. To improve the computation accuracy, a Booth-encoded sign-digit-based conditional probability estimation approach is proposed. A symmetric error distribution is obtained by taking the sign bit of the Booth-encoded multiplier into consideration when applying the conditional probability. In addition, a more generalized mux-based estimation method is formulated for the circuit implementation, which reduces the delay time and power dissipation. Simulation results show that the proposed multiplier exhibits the best computation accuracy with the least energy per operation. It performs even better for those operand lengths that are not multiples of 4. The maximum reduction on energy-delay-error product can reach 14.8% compared with all its contenders among various operand lengths.
Keywords:
Fixed-width multiplier
Booth encoding
approximate computation
mean square error
energy-efficient
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Journal

I
IEEE Transactions on Circuits and Systems and Express Briefs
IF:
4.9
Papers:
8.8K
Citations:
2.5W

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