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A Low-Power, Analog-Integrated, Current-Mode, and Fully Tunable Artificial Neural Network Classifier Architecture for Biomedical Engineering Applications

delete2026-01-01
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PRE
AI
A
Alimisis, Vassilis *
P
Papathanasiou, Andreas
M
Moustakas, Vasileios
M
Mylona, Anna
D
Dimas, Christos
S
Sotiriadis, Paul P.
DOI:10.1109/OJCAS.2026.3665625delete
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Abstract

Abstract

En 中文
This work presents a low-power, current-mode analog artificial neural network (ANN) classifier implemented in the TSMC 65-nm CMOS process and evaluated on two biomedical classification tasks. The architecture incorporates analog Sigmoid, Euclidean distance, min and argmin computation blocks to enable fully integrated feature correlation, weight adaptation, and decision-making. All circuits operate in the subthreshold regime with +/- 0.3V supply rails. Post-layout simulations show a worst-case classification accuracy of 91.7% and strong robustness to Monte-Carlo mismatch and Process-Voltage-Temperature variations. Comparison with an equivalent software classifier and prior works validates the modeling and design methodology. The architecture achieves worst-case power consumption below 1311 nW, demonstrating its suitability for energy-constrained edge-AI applications in biomedical monitoring and diagnostics.
Keywords:
Sensor systems
Aerospace and electronic systems
Feeds
Antennas
Circuits
Circuits and systems
Current mirrors
Field programmable gate arrays
Integrated circuits
Very large scale integration
Artificial neural network
analog hardware classifier
low-power classification
biomedical engineering applications

Journal

I
IEEE Open Journal of Circuits and Systems
IF:
2.4
Papers:
4.5K
Citations:
387

Organization

N
National Technical University of Athens
Scholars:
9.5K
Papers: 9.4K
Citations: 8.2K
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