A Memory Efficient Belief Propagation Decoder for Polar Codes

doi:10.1109/CC.2015.7112042

A Memory Efficient Belief Propagation Decoder for Polar Codes

2015-05-01

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DOI：10.1109/CC.2015.7112042

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Polar codes have become increasingly popular recently because of their capacity achieving property. In this paper, a memory efficient stage-combined belief propagation (BP) decoder design for polar codes is presented. Firstly, we briefly reviewed the conventional BP decoding algorithm. Then a stage-combined BP decoding algorithm which combines two adjacent stages into one stage and the corresponding belief message updating rules are introduced. Based on this stage-combined decoding algorithm, a memory-efficient polar BP decoder is designed. The demonstrated decoder design achieves 50% memory and decoding latency reduction in the cost of some combinational logic complexity overhead. The proposed decoder is synthesized under TSMC 45nm Low Power CMOS technology. It achieves 0.96 Gb/ s throughput with 14.2mm(2) area when code length N=2(16) which reduces 51.5% decoder area compared with the conventional decoder design.

Keywords:

polar codes

belief propagation

stage-combined

memory-efficient

implementation

A Memory Efficient Belief Propagation Decoder for Polar Codes

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