A Multi-Form Optimization Framework for Analog Integrated Circuit Sizing

doi:10.1109/TCSI.2025.3572282

A Multi-Form Optimization Framework for Analog Integrated Circuit Sizing

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DOI：10.1109/TCSI.2025.3572282

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In recent years, simulation-based optimization methods for analog integrated circuit design parameters optimization (a.k.a sizing) have attracted extensive research interest. Currently, researchers primarily focus on developing efficient algorithms while paying little attention to decision spaces. This work focuses on the decision space, aiming to improve the efficiency and usability of the parameters optimization task. linear and dynamic circuits. We also handle circuit constraints by directly fine-tuning search bounds. Second, taking the high-fidelity EKV model, we demonstrate the unique characteristics of the electrical design space and prove that a bijective relationship exists between the two decision spaces. Third, we propose a multi-form (MF) optimization framework that simultaneously optimizes the physical design space and electrical design space. This framework avoids the choice of decision space and enhances the algorithm’s optimization efficiency by transferring candidate solutions between two decision spaces. Also, we propose to solve the MF optimization task with Bayesian optimization and population-based algorithms. The proposed sizing framework is verified on three typical analog circuit sizing tasks: single-objective, multi-objective, and yield optimization problems. The result and ablation study show that the proposed framework consistently achieves better results compared to traditional single-space optimization methods, with significantly fewer iterations.

Keywords:

Analog integrated circuit sizing

multi-form optimization

gm/ID methodology

integrated analog circuit optimization

A Multi-Form Optimization Framework for Analog Integrated Circuit Sizing

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