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A Parallel Stochastic Number Generator With Bit Permutation Networks

delete2018-02-01
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V
Vikash Sehwag
N
Neeli R. Prasad *
I
Indrajit Chakrabarti
DOI:10.1109/TCSII.2017.2708128delete
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Abstract

Abstract

En 中文
Stochastic computing (SC) is a promising paradigm to realize low-complexity digital circuits that are tolerant to soft errors. Stochastic circuits include a stochastic number generator (SNG) to generate a stochastic number that corresponds to a given binary number. Conventional SNGs, which employ linear feedback shift registers (LFSRs) to generate stochastic numbers in a serial manner would cost significantly in time. In this brief, a parallel SNG has been proposed, which can generate stochastic numbers in parallel by transforming the input binary number to a modified unary number and permuting it using a bit permutation network. Further, a method to share a single LFSR among multiple SNGs has been presented. Experimental results show that the proposed SNG can achieve improvement in SC correlation and energy-delay-product by 28.57% and 4.32x, respectively, when compared to the existing shared LFSR-based SNG. For applications, such as edge detector, multiplier, and complex multiplication, the proposed SNG has achieved reduction in execution time and area-delay-product by up to 1000x and 9x, respectively, as compared to others.
Keywords:
Bit permutation
low latency
omega-flip network
stochastic computing
stochastic number
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Journal

I
IEEE Transactions on Circuits and Systems and Express Briefs
IF:
4.9
Papers:
8.8K
Citations:
2.5W

Organization

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indian institute of technology system (iit system)
Scholars:
9.5W
Papers: 9.9W
Citations: 93