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A Switch-as-Resistor Self-Adaptive Gate-Biasing Technique for Optimized Forward and Reverse Conduction in a CMOS Rectifier
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DOI:10.1109/TCSII.2025.3578345.png)
Abstract
En 中文
This brief proposes a switch-as-resistor self-adaptive gate-biasing technique implemented in a 900 MHz single-stage cross-coupled rectifier for IoT and WSN applications. The proposed method employs NMOS switches as the resistive component (RRES), which are controlled by a rectangular signal from a CMOS inverter. This configuration adaptively enables (disables) the NMOS switches during reverse (forward) conduction phases, and self-adaptively provides gate-biasing, resulting in conserved forward charge with mitigated reverse charge. As a result, the output power is enhanced with higher charge accumulation at the output terminal. The circuit gives a measured result of 84.3% in peak power conversion efficiency (PCE) at an input power (PIN) of –21 dBm through a 100 k<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula> load. The proposed circuit also achieves a 25 dB DR with a PCE of over 20%. With a compact chip area of 0.0105 mm2, the rectifier achieves the widest PDR of 25 dB and a sensitivity of –18 dBm under a 100 k<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Omega $ </tex-math></inline-formula> load. Compared to other state-of-the-art rectifiers, the proposed scheme demonstrates higher performance in terms of PDR and PCE.
Keywords:
CMOS rectifier
power conversion efficiency (PCE)
PCE dynamic range (PDR)
RF energy harvesting (RFEH)
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4.9
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8.8K
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2.5W
