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Accelerating GridSearchCV hyperparameter tuning method using an FPGA-based hardware accelerator
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DOI：10.1007/s11227-025-08124-7.png)
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Abstract
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Machine learning models underpin critical applications, and their performance hinges on effective hyperparameter tuning, yet exhaustive methods like GridSearchCV are computationally intensive on general-purpose systems. This paper presents a custom FPGA accelerator for the GridSearchCV–KNN pipeline, simulated on an Intel Cyclone V platform. The six-module RTL design features an on-chip unique memory unit, a pipelined Manhattan distance subtractor, and a parallel sorting Distance Memory that tracks nearest neighbors without explicit sorting. A dedicated hardware controller manages hyperparameter grid enumeration and K-fold evaluation entirely in hardware. We introduce ’CV-full’ (Leave-One-Out Cross-Validation) to test our system under the most intensive circumstances. Post-synthesis simulations show average speedups of 1.8 $$\times$$ , 2 $$\times$$ , and about 10 $$\times$$ under 5-fold, 10-fold, and CV-full settings, respectively, with a peak of 27.7 $$\times$$ over a Google Colab server. By minimizing off-chip memory access and explicit sorting stages, our FPGA design offers a special-purpose hardware solution for accelerating GridSearchCV–KNN hyperparameter tuning.
Keywords:
FPGA
GridSearchCV
Hardware accelerator
Hyperparameter tuning
Machine learning
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