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Accelerating In-memory Database Functionality with FPGAs

delete2025-01-31
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OA
AI
J
John J. Leggett *
J
John McGlone
S
S.S. Demirsoy
C
Christian Faerber
V
Vadim Pelyushenko
DOI:10.1145/3706113delete
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Abstract

Abstract

En 中文
In this article, we present a hardware offload of part of the delta merge process used in In-Memory Databases (IMDBs). The delta merge process is fundamental in maintaining high transactional throughput for IMDBs. Improving the efficiency of the delta merge process allows running it more frequently, which will improve the performance for transactional throughout for an IMDB. Our FPGA design supports more use cases than existing research, and was demonstrated to be faster than the existing implementation in an enterprise database, offering speedups of between 4x and 100x compared to the CPU optimised implementation, depending on the properties of the database columns.
Keywords:
FPGA
database
dictionary
compression
offload
delta
merge

Journal

ACM Transactions on Reconfigurable Technology and Systems cover
ACM Transactions on Reconfigurable Technology and Systems
IF:
2.8
Papers:
597
Citations:
810

Organization

Q
Queen's University Belfast
Scholars:
1.6W
Papers: 1.7W
Citations: 2.5W
I
intel germany
Scholars:
40
Papers: 33
Citations: 0
I
Intel Corporation
Scholars:
2.7K
Papers: 2.0K
Citations: 6
I
intel united kingdom
Scholars:
20
Papers: 16
Citations: 0
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