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An experimental evaluation of RISC-V cores: Software support and performance analysis
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DOI：10.1016/j.sysarc.2026.103871.png)
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Abstract
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• Empirical evaluation of six RISC-V cores reveals significant software fragmentation. • Vendor-specific toolchains are frequently recommended, possibly limiting software portability. • High-end RISC-V ASICs match mid-range embedded ARM cores in processing throughput. • The tested soft-core on the recommended FPGA development boards lack the memory subsystem to sustain complex Linux workloads. • Significant performance gaps persist between the considered RISC-V cores and high-end ARM/x86 architectures.
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