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An improved midpoint rasterization algorithm implemented in FPGA
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DOI：10.1016/j.displa.2022.102364.png)
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Abstract
En 中文
With the continuous progress of technology and the improvement of people's consumption level, requirements for picture quality are constantly increasing, which has raised the requirements for graphic processing units (GPU) and promoted their development. Among functional modules of GPU, the rasterization module is an important part of GPU. In this paper, we first review the development of rasterization algorithms and analyze their advantages and disadvantages. After that, we improve classical midpoint traversal by adding the idea of tile scanning and improving the parallelism of the algorithm and propose a tile-based multi-parallel midpoint traversal. Then, we implement and verify the proposed algorithm on software and hardware and compare the performance of the proposed algorithm with other algorithms to verify the superiority of the proposed algorithm. Finally, we deploy the improved algorithm in FPGA to verify the feasibility of the hardware.
Keywords:
Rasterization
Midpoint traversal
Tile traversal
Computer graphic
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