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An operating system accelerator

delete1998-06-01
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PRE
AI
J
Jovan Djordjević
M
Milo Tomašević
M
M. Bojović
P
Potic, V
S
Siniša Randjić
DOI:10.1016/S1383-7621(97)00043-Xdelete
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Abstract

Abstract

En 中文
A RISC-style hardware accelerator for operating systems (OS), named the mechanism of multiprocessing (MMP) processor, is presented. The MMP processor implements the set of MMP primitives of the MMP mechanism with which the ES operating was enhanced. The architecture and organisation of this processor were devised to facilitate fast execution of the MMP primitives. The architecture adopted ensures the efficient mapping of typical operations and data structures used in the MMP primitives. The hardware resources were selected and interconnected in such a way that, with pipelined control, the organisation envisaged can support their fast execution. The prototype of the MMP processor was developed and put into operation with the extensive usage of the interactive development and testing (INDAT) system, a specially designed tool for the development and testing of the MMP processor.
Keywords:
hardware accelerators
RISC processors
operating systems
development tools
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Journal

Journal of Systems Architecture cover
Journal of Systems Architecture
IF:
4.1
Papers:
3.0K
Citations:
4.2K

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