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AxLS: A Framework for Approximate Logic Synthesis Based on Netlist Transformations
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DOI：10.1109/TCSII.2021.3068757.png)
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Abstract
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With the rise of Approximate Computing as an energy-efficient design paradigm that is amenable to error-tolerant applications, different Approximate Logic Synthesis (ALS) techniques have been reported in the literature to generate approximate circuits from accurate implementations automatically. One ALS technique focuses on performing structural netlist transformations. The gate-level netlist representation of a circuit is simplified to reduce the circuit area and power consumption while producing a defined error level at the output. However, currently, there is no framework or tool available to test and explore existing netlist transformation techniques for ALS. This limits the proposal of novel approaches and their corresponding comparison against state-of-the-art contributions. In this brief, we present AxLS, an open-source framework for ALS techniques based on netlist transformations. We validate our framework's functionality by implementing a reported ALS technique and one proposed, using open-source circuit synthesis and simulation tools, and generating approximate arithmetic circuits from accurate RTL descriptions.
Keywords:
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Logic gates
Integrated circuit modeling
Tools
Libraries
Hardware design languages
Delays
Approximate computing
logic synthesis
design tools
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