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Based on Tensor Core Sparse Kernels Accelerating Deep Neural Networks

delete2025-11-26
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PRE
AI
S
Shijie Lv
刘德彬 cover
刘德彬 (Debin Liu)
L
Laurence T. Yang
X
Xiaosong Peng
R
Ruonan Zhao
杨泽灿 cover
杨泽灿 (Zecan Yang)
J
Jun Feng
DOI:10.1109/TPDS.2025.3637268delete
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Abstract

Abstract

En 中文
Large language models in deep learning have numerous parameters, requiring significant storage space and computational resources. Compression techniques are highly effective in addressing these challenges. With the development of hardware like Graphics Processing Unit (GPU), Tensor Core can accelerate low-precision matrix multiplication but achieve acceleration for sparse matrices is challenging. Due to its sparsity, the utilization of Tensor Cores is relatively low. To address this, we propose the based on Tensor Core Compressed Sparse Row format (TC-CSR), which facilitates data loading on GPUs and matrix operations on Tensor Cores. Based on this format, we designed block Sparse Matrix-Matrix Multiplication (SpMM) and Sampled Dense-Dense Matrix Multiplication (SDDMM) kernels, which are common operations in deep learning. Utilizing these designs, we achieved a $\mathbf {1.41\times }$ speedup on Sputnik in scenarios of moderate sparsity and a $\mathbf {1.38\times }$ speedup with large-scale highly sparse matrices. Benefit from our design, we achieved a $\mathbf {1.75\times }$ speedup in end-to-end inference with sparse Transformers and save memory.
Keywords:
Deep learning
GPU
tensor core
sparse matrices
acceleration strategy

Journal

IEEE Transactions on Parallel and Distributed Systems cover
IEEE Transactions on Parallel and Distributed Systems
IF:
6
Papers:
5.2K
Citations:
1.1W

Organization

Z
Zhengzhou University
Scholars:
6.8W
Papers: 4.4W
Citations: 8.5W
H
Hainan University
Scholars:
2.0W
Papers: 1.2W
Citations: 1.9W
H
huazhong university of science and technology
Scholars:
2.7W
Papers: 8.1K
Citations: 5
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Cited Papers

Cited Papers

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