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Body-Biased Hybrid Sense Amplifier With High Offset Tolerance for Low-Voltage SRAMs

delete2025-08-01
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PRE
AI
M
Minglong Jia
P
P. P. Zhao
L
Linnan Li
X
Xiang Li
H
Huidong Zhao
S
Shushan Qiao
DOI:10.1109/TCSII.2025.3582549delete
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Abstract

Abstract

En 中文
The offset voltage (VOS) of the Sense Amplifier (SA) is a critical parameter that affects sensing delay and energy consumption in SRAM. This brief proposes a Body-Biased Hybrid Sense Amplifier (BHSA) that effectively reduces the standard deviation (<inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sigma {_{\text {OS}}}$ </tex-math></inline-formula>) of VOS in low-voltage SRAM applications without need for the additional capacitors or auxiliary control circuits. Results of post-simulation demonstrate that the BHSA shows an average 44% reduction in <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\sigma {_{\text {OS}}}$ </tex-math></inline-formula> compared to the VLSA across the 0.3-0.9 V supply voltage range, with a specific reduction of 49.4% achieved at 0.3 V. Two 16 kb SRAMs with integrated BHSA and VLSA, respectively, were fabricated under the 22 nm FDSOI technology. Measurements indicates that the SRAM with integrated BHSA achieves a 48.2% reduction in bitline discharge delay and a 13.7% decrease in read power consumption at 0.45 V compared to traditional designs.
Keywords:
Sense amplifier
offset tolerance
body biasing
static random access memory (SRAM)

Journal

I
IEEE Transactions on Circuits and Systems and Express Briefs
IF:
4.9
Papers:
8.8K
Citations:
2.5W

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