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Breaking the Memory Wall in MonetDB

delete2008-12-01
delete143
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OA
AI
P
Peter Boncz *
M
Martin Kersten
S
Stefan Manegold
DOI:10.1145/1409360.1409380delete
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Abstract

Abstract

En 中文
In the past decades, advances in speed of commodity CPUs have far outpaced advances in RAM latency. Main-memory access has therefore become a performance bottleneck for many computer applications; a phenomenon that is widely known as the memorywall. In this paper, we report how research around the MonetDB database system has led to a redesign of database architecture in order to take advantage of modern hardware, and in particular to avoid hitting the memory wall. This encompasses (i) a redesign of the query execution model to better exploit pipelined CPU architectures and CPU instruction caches; (ii) the use of columnar rather than row-wise data storage to better exploit CPU data caches; (iii) the design of new cache-conscious query processing algorithms; and (iv) the design and automatic calibration of memory cost models to choose and tune these cache-conscious algorithms in the query optimizer.
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Journal

Communications of the ACM cover
Communications of the ACM
IF:
12.2
Papers:
1.2W
Citations:
3.7W

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